Designing Asynchronous Circuits for Dynamic Machine Learning Adaptation

Maya Gokhale | 22-DR-009

Executive Summary

We will develop asynchronous (or clockless) microelectronics logic designs for deep learning networks that can adapt themselves as data and operating conditions change. This will provide low-power microelectronics designs with much higher efficiency, allowing improved near-sensor computing capabilities for remote sensing and autonomous vehicles.

Publications, Presentations, and Patents

Krishnan, S., Wan, Z., Bhardwaj, K., Whatmough, P., Faust, A., Neuman, S., Wei, G.Y., Brooks, D. and Reddi, V.J., 2022, October. Automatic Domain-Specific SoC Design for Autonomous Unmanned Aerial Vehicles. In 2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO) (pp. 300-317) (Selected for IEEE MICRO top picks, 2023 (honorable mention).

K. Bhardwaj, Z. Wan, A. Raychowdhury, R. Goldhahn, "Real-time Fully Unsupervised Domain Adaptation for Lane Detection in Autonomous Driving," (Presentation, 2023 Design, Automation and Test Conference in Europe, CEDA, Antwerp, Belgium, April, 2023).  Late Breaking Results. 

Gokhale, T., R. Anirudh, J.J. Thiagarajan, B. Kailkhura,, C. Baral, & Y, Yang. "Improving Diversity with Adversarially Learned Transformations for Domain Generalization."  In Proceedings of the IEEE WACV 2023.

Lieberman, K., Diffenderfer, J., Kailkhura, B., Neural Image Compression in the Wild: Benchmark and Introspection Tools. Accepted in NCW (ICML) 2023.